Prompted by the chipmaker's announcement of the SSE5 instruction-set extensions, Glaskowsky analyzes the ultimate outcome to this old controversy. Peter N. Glaskowsky is a computer architect in ...

Ten years ago, I waded into the then-raging “Mac vs. PC” wars with a lengthy treatise on “RISC vs. CISC: the Post-RISC Era.” In the conclusion to that article, I declared the “RISC vs. CISC” debate ...

Indeed, most processors today — RISC or CISC — are about three-quarters cache, with a little CPU core lurking in one corner of the chip. ARM can get away with slashing its transistor budget because it ...

For months, Apple has been fighting a battle to convince folks that megahertz (MHz) isn’t the most important statistic in determining the speed of a computer. Apple hasn’t made much headway, but ...

A computer processor uses a so-called Instruction Set Architecture to talk with the world outside of its own circuitry. This ISA consists of a number of instructions, which essentially define the ...

With an eye on the diverse needs of future embedded-system applications, the RX600 Series MCUs forecasts a re-defining of the performance capabilities of complex instruction set computer (CISC) based ...

The Power architecture doesn’t get the attention it deserves. With Power5 servers finally shipping, even non-Big Blue shops should take look again If all things were equal and IBM made its systems as ...